Developing the holistic approach - from single element testing to system validation

Authors: T. Schossig and C. Pritchard, OMICRON electronics Gmbh, Austria

System Testing Equipment Typical Components

Single line: Every activity in a substation starts with a look on the single line diagram.  Even IEC 61850 offers the opportunity to include single line information. The upcoming IEC 61850 part 6-2 (Configuration description language for extensions for human machine interfaces) will even describe the elements.
Modern test equipment must include and visualize single line information.

Testing the communication of several IEDs instead of single:  With IEC 61850 it became possible, to connect to several IEDs during a test and show test GOOSE sent out as multicast (one to many).  This is the move from single device under test (DUT) to multiple (Figure 9).

Power system simulation: The simplest method to test the protection system for real world scenarios is to use a power system simulation to calculate the voltage and current signals. Such a power system simulation can be directly integrated into the testing SW. After entering the power system data of the small network segment, we need to investigate, we can define fault scenario (or other system conditions).  The power system simulation will calculate the scenario and directly output the signals via the test set. Using a transient simulation, advanced protection functions like power swing blocking, time domain protection etc. and scenarios involving CT saturation, series compensation etc. can be tested.
Contrary to a steady-state threshold test, such a test validates if the protection system is working correctly under real power system conditions. (Figure 11).

Testing more than one IED (also distributed): Using a power system simulation also helps us with our goal of testing a system of IEDs. The biggest challenge when testing multiple IEDs is to calculate consistent test signals for each IED within a test step. The simulation takes care of this, as every simulation step calculates the test signals for each bay simultaneously.
The next challenge is to inject all test signals simultaneously. If the IED is still connected conventionally to the process values (e.g. via CTs and VTs), the capabilities of a single test set are often the limiting factor. To overcome this limitation, it is known practice to time-synchronize multiple test sets. The innovation here is to control these test sets from one single application.
If testing in only one substation, the test sets can time synchronize each other, by providing a IEEE 1588 PTP Master themselves via their Ethernet port – no additional GPS signal required. The testing SW calculates the transient signals within the simulation and transfers the signals onto the test sets. After the transfer is completed, the SW will set a start time (usually 10s ahead) for all test sets. The test sets will start the execution and record the binary events. After the execution is completed, the binary events are transferred back to the software for assessment.

If the test sets are positioned in different substations, each substation will need a GPS clock to provide the time. To control the remote test sets, a PC at the remote station (with Internet connection) needs to run a remote agent that grants remote access for the test set to the controlling PC. The principal of execution is the same.
The benefit of controlling multiple test sets with one SW are:

  • No coordination via phone required
  • Troubleshooting a test from one PC
  • All relay responses available in one software for an overall assessment
  • One report of the whole test

The remaining issue with these setups is the wiring effort that is linearly increasing with the amount of test sets. With IEC 61850 process bus on the horizon, the wiring effort becomes almost zero. As all process data (currents, voltages, CB status etc.) are available on one or multiple switches, we can freely decide, which part of the system we want to test. The test isolation would be performed using the mode data object in each logical node of the IED. Afterwards the test set would start injecting Sampled Values and GOOSE with the simulation flag set to true. On IEDs under test the LPHD.SIM will be set to truly correspond. After all test cases are executed successfully, the routine would have to be reversed.

Testing logic:  Logic errors are one of the main causes for misoperations. While standard protection elements are type tested already at the manufacturer, custom logic is completely in the hands of the engineer. Therefore, we already concluded that we must focus more on testing automation and logic. The challenge in testing logic until today is that the test sequences must be built manually. This test sequence must satisfy multiple conditions, which are not only binary logic, but also voltages and currents. Testing systems of IEDs even in different substations, further adds some challenges.
When testing logic from a system perspective, we need only make sure that when a trip or close command is sent, the breaker must operate within the simulation and the correct current flow must be simulated across all IEDs. If this is not the case, it might be considered as a breaker failure and logic that would become active after the first trip cannot be executed.
The capability of a simulation to react to a command of the system under test is usually called real-time closed-loop. But real-time simulation systems are only suitable for the lab, require expert knowledge and a high investment.
A suitable alternative to hard real time is an iterative closed-loop algorithm.

Assuming a test case with a line fault: As already described, the transient waveforms get calculated and transferred to the test sets. The test sets will simultaneously start the injection (of the first iteration). Shortly after the fault inception and current gets injected, the IED will respond with a trip. The waveforms didn't include any breaker opening, so the test system will immediately stop the injection of all test sets. Based on the assumption, that the trip will occur with the same time delay after fault inception again, new waveforms are calculated, containing the fault inception and a breaker open event. The test sets will simultaneously start to inject the (second iteration) waveform again. Again, after fault inception the IED under test will trip, but this time the waveforms contain the breaker opening event. With some time delay the IED will issue a close command. Now the same procedure will repeat. Finally, after all breaker commands have been automatically added to the simulation, the final iteration will be taken as the result for assessments, which achieves a similar result as a real-time simulator. The whole process runs fully automated, which simplifies logic testing. To test an auto-reclose sequence, the tester only places a fault on the line and the iterative closed-loop will take over. Figure 12 shows an example with two iterations. A miscoordination becomes immediately visible in the power system diagram.

BeijingSifang June 2016