DCBPU Operating Concept

Directional Comparison Bus Protection employs direction of fault of all connected feeders to detect the bus fault. It performs a proper operation when all of the directional relays have determined the fault direction.

• If the fault direction in all of the circuits is into the bus, an internal bus fault exists (Figure 1a)
• If the fault direction in at least one circuit is away from the bus Di = -1, an external fault exists (Figure 1b)

Different algorithms such as negative or zero sequence based directional elements or superimposed directional method can be used to implement DCBPU.  It should be noted that, there is a difference between fault direction and current direction. In case of a high resistive fault which is very rare in case of bus faults, the current in some feeders could still flow away from the bus while the true fault direction is into the bus. DCBPU requires fault direction to reliably detect the bus fault in all cases.
The proper selection of current source for each feeder and zones of protection can be followed as per “IEEE Guide for Protective Relay Applications to Power System Buses," while the voltage source should be carefully selected.
As investigated in "Suitability analysis of practical directional algorithms for use in directional comparison bus protection based on IEC61850 process bus," bus voltage either measured or calculated out of feeder voltages should be used for superimposed directional techniques while feeder voltages are appropriate for other directional techniques. Considering that the DCBPU excludes the feeder with open breaker from the decision making, the challenge is to ensure that the directional element performs properly in the context of directional comparison bus protection during simultaneous breaker operation and a bus fault.

This can be overcome first by the combined use of current signal and breaker status to reliably determine the breaker status, and second by exclusion of directional elements with small measured current to avoid incorrect directional determination when there is significant subsidence current at the secondary of the saturated current transformer.
As shown in Figure 2, in case of a single bus sectionalized with a tie breaker and current transformers on both sides of the tie breaker, there should be two zones of protection - Bus zone 1 and Bus zone 2 protecting segments S1 and S2 respectively.
For Bus zone 1, four directional elements are required. Let’s assume that the current flows into the bus for Feeders 1 and 2 and exits from the bus to Feeder 3 and the tie breaker branch from left to right. Now if the tie breaker starts opening and at the same time a fault occurs on segment S1, all three feeders, Feeders 1-3, will feed the fault.

Therefore, it is up to the fourth directional element and breaker status to determine the output of DCBPU. Three scenarios can occur as described below:

• The tie breaker is physically open and it has been detected as open. In this case, the directional element associated with the tie breaker branch will be excluded and a bus fault will be detected since all the included directional elements determine fault direction towards the bus
• The tie breaker is physically open and it has not been detected as open yet. In this case, the current measured by CT1 is small and the directional element associated with the tie breaker branch will be excluded. Therefore, a bus fault will be detected as all the included directional elements determine fault direction towards the bus
• The tie breaker is not physically open and it has not been detected as open. In this case, the current measured by CT1 is not small and the directional element associated with the tie breaker branch will be included, but its direction will change from right to left towards the bus fault. Therefore, a bus fault will be detected as all the included directional elements determine fault direction towards the bus S1

Operating principles of directional comparison bus protection unit based on IEC 61850 process-bus are similar to conventional directional comparison bus protection principles. However, in the former one, sampled bus voltage and feeder currents are converted into network packets in MUs and they are transferred through network cables or fiber optics through network switches or directly to the DCBPU based on IEC 61850-9-2. Directional Comparison Bus Protection receives the data packets and performs protection functions to determine the trip signal. Trip signals are sent to breaker IEDs or MUs to trip associated circuit breakers using several GOOSE messages within process bus according to IEC 61850-8-1.

Test Power System

A 50Hz power system including a typical bus with six feeders is simulated in PSCAD/EMTDC to validate the performance of DCBPU using superimposed technique for directional elements. Figure 3 shows the simulated power system including five line feeders and one transformer feeder (Feeder 6) connected to a 230kV busbar.

Line 1 is split into two parts to simulate an external fault, i.e. - a line fault. Each feeder is equipped with CT and CVT to measure three phase voltages and currents. The power system at the other end of each feeder is modeled by an equivalent source. Details of power system apparatus models in PSCAD are provided in Figure 3. Burdens of the CTs which measure Feeder 1 and Feeder 6 currents are adjusted to 5 ohm to force the CTs to saturation thereby the performance of the proposed bus protection can be assessed during CT saturation for both the bus and line faults.

According to IEC 61850-9-2, the sampling rate is selected as 80 samples per cycle (4000 Hz sampling in 50 Hz power system) for protection purposes, thus; appropriate anti-aliasing filters with cut off frequency of 1500 Hz are applied to all measured voltages and currents in PSCAD/EMTDC before waveform recording. Each set of voltages and currents of the MU is recorded in a COMTRADE file. A 50Hz power system is simulated in PSCAD/EMTDC. The recording interval is set to 250 µs.

Laboratory Setup
As shown in Figure 4, test setup includes test device, traffic generator, DCBPU, three Ethernet switches and a workstation computer. Six synchronized MUs are required to implement the test system. In order to simplify the implementation of the test setup, all of the MUs are simulated in one embedded computer with a real time operating system called a merging unit simulator in which six network interfaces are provided where each one emulates one MU. The voltage and current samples for each MU are recorded every 250 µs in a separate file with COMTRADE format. Specific real time software is developed in the test device which imports the COMTRADE files and converts them to SV packets according to IEC 61850-9-2 LE and plays-back six SV packets every 250 µs for 50 Hz system to six network interfaces simultaneously. In addition, each network interface also captures circuit breaker trip signals by receiving GOOSE message. Finally, it calculates and prints the operating time of the protection system excluding the circuit breaker opening time. Since only one embedded computer is used to emulate all the MUs, there is no need for synchronization facilities during testing.

The second element of the test setup is the DCBPU,  which is implemented in an embedded computer with real time operating system.  A single core CPU with processing speed of 3.2 GHz is used to implement the proposed algorithm. Significantly slower CPU with multiple DSPs can be utilized to implement DCBPU protection on a big bus with numerous feeders. Protection pass is set to 0.5 msec and in this case, CPU was 30% loaded. DCBPU is equipped with two network interfaces. One is used for connecting to process bus to capture SV packets and to publish GOOSE messages indicating the trip signal. Once the final trip signal is obtained, GOOSE message for opening the breaker will be sent immediately and will be repeated 7 times after 1, 2, 4, 8, 16, 32, and 50 milliseconds. Second network interface is connected to workstation computer for monitoring.

Traffic generator is the third element of the test setup which emulates the impact of other IEDs and network traffic on DCBPU operation. Traffic generator is equipped with five network interfaces; four are assigned to generate network traffic while one interface is used for user interface. Traffic generator transmits additional GSSE, GOOSE and IP packets through four network interfaces. Two network interfaces are connected to each network switch. Table 1 shows the rate and size of the data which are sent from each network interface of the traffic generator. Three commercial Ethernet switches which are in compliance with IEC 61850 are used in the test setup to implement process bus and station bus. Ethernet switches are set to consider priority tagging. A workstation computer is connected to the test device, traffic generator and DCBPU to program, set and monitor the devices.

Results

Table 2 shows the hardware test results. As it is shown, Directional Comparison Bus Protection Unit performance is tested under various conditions. Different Source Impedance Ratios (SIRs) {0.2, 1, 5} for connecting feeders, different fault locations {Line and Bus}, fault resistances {0 and 30 ohm}, different Point on Waves (POW) {Zero, Mid and Peak} which are the fault inception points at different angles of the voltage waveform (0, 45 and 90 degrees respectively) and different fault types {single phase to ground (AG) and phase-to-phase fault (BC)}. Since network performance impacts on relay operating time, hardware tests for cases that the relay operates has been repeated four times. Operation times are averaged over different POWs and four repeats.

According to the results, the proposed relay operates very fast for bus faults while it is stable for external faults i.e. line faults. Average relay operating times are within 5.7 to 6.6 ms. The relay operation time does not vary considerably by any change in system parameters, fault types, fault resistance and POWs.
This is one of the main advantages of superimposed based directional technique.

Conclusions
The application of Directional Comparison Bus Protection in substation automation systems based on IEC 61850 process bus is investigated in this article. A 230kv bus with six feeders is simulated in PSCAD/EMTDC. Directional Comparison Bus Protection Unit is implemented. An appropriate test setup is provided to test the performance of the proposed relay. Test results are reported. According to the test result, the proposed relay never loses dependability and security and operates within 5.7- 6.6 ms for the studied cases. 

Sidebars:
DCBPU employs direction of fault of all connected feeders to detect the bus fault.

One of the key challenges of conventional bus protection relays for big buses is to acquire current signals from numerous CTs in one box.

The proper selection for current source for each feeder and zones of protection can be followed as per IEEE guide.

Traffic generator is the third element of the test setup which emulates the impact of other IEDs and network traffic on DCBPU operation It transmits additional GSSE, GOOSE and IP packets through four network interfaces.

Biographies

Tarlochan Sidhu (M'90-SM'94-F'04) received the B.E. (Hons.) degree from the Punjabi University, India and the M.Sc. and Ph.D. degrees from the University of Saskatchewan, Canada. He was with the Regional Computer Center, Chandigarh, India, and Bell-Northern Research Ltd., Ottawa, ON, Canada. From 1990 to 2002, he was as a Professor and Graduate Chairman of the University of Saskatchewan. Currently, he is Professor and Chair of the Electrical Engineering Department at the University of Western Ontario, London. He is also the Hydro one Chair in Power Systems Engineering. Dr. Sidhu is a Fellow of the Institution of Engineers (India) and (U.K.). He is also a Registered Engineer in the Province of Ontario and a Chartered Engineer in the U.K

Mohammad R. Dadash Zadeh   M'06) received B.S. and M.Sc. degrees from University of Tehran, Iran, and Ph.D. from University of Western Ontario, London, ON, Canada all in Electrical Engineering. From 2002 to 2005, he was with Moshanir Power Engineering Consultants and served as a system study engineer. He worked as a post-doctoral fellow in University of Western Ontario, London, ON, Canada. From 2010 to 2011, he was with GE Multilin active in design and production in the areas of microgrid control and automation, synchrophasor measurement system and protective relays. Currently, he is an assistant professor with the Department of Electrical and Computer Engineering at the University of Western Ontario, London, ON, Canada.

Andrew Klimek  (M'94) received the B.Sc. and M.Sc. degrees in Electrical Engineering at the Technical University of Lublin, Poland. He is a member of CIGRE & IEEE, with 38 years of experience serving the electric power industry globally.  His interest is in system stability analysis, monitoring and mitigation concepts, advanced protection and system control.  He was appointed an Advisory Professors of Beijing Jiaotong University in 2007, and invited as an Adjunct Professor to the Schools of Electrical Engineering of Xi'an Jiaotong University in 2008. He is also Registered Professional Engineer in the Province of British Columbia. Andrew's recent role was the Global R&D Director of AREVA T&D Automation Product Line, and currently serves as the Director, Smart Utility, Power-Tech Labs, Canada.